The invention relates to a transmitter, and more particularly, to a combined transmitter capable of transmitting low voltage differential signaling (LVDS) and transition minimized differential signaling (TMDS).
Low Voltage Differential Signaling (LVDS) is a high-speed, low power interface used by most notebook computer manufactures to create a direct digital connection between the central processing unit (CPU) and LCD display. It provides very high line transmission rate, requires little power and generates low noise levels. LVDS technology, optimized for short cable runs in an effort to transition LVDS technology to external desktop monitors failed.
FIG. 1A shows a conventional LVDS transmitter 10. The LVDS transmitter 10 converts data (RED, GREEN, BLUE, HSYNC, VSYNC and DE) and input clock CLKIN to data streams for output to a corresponding receiver through signal lines by output drivers 141. FIG. 1B is a diagram of the output driver 141 and a corresponding input unit 181 of the receiver (not shown). As shown, the LVDS output driver 141 is a current mode line driver, creating a differential voltage at the input unit 182 of the receiver 18 by current steering. For example, the current Iref flows to ground through the signal line 19, the terminal impedance 2RT of about 100Ω and the signal line /19 by turning on switches A and the switches B off, and vice versa.
Transition Minimized Differential Signaling (TMDS) is an electrical standard used to transmit digital data to a display. The signal is optimized to reduce electromagnetic interference (EMI), which allows faster signal transfer with increased accuracy. The differential circuitry in TMDS allows complimentary limited amplitude signals to be transmitted over twisted pair wires rather than more expensive coaxial cable. The LVDS transmitter encodes and serially transmits a data stream over a TMDS link to a TMDS receiver. Video and sync information are serialized and sent over three sets of twisted pair wires, with an additional pair of wires transmitting a clock signal for timing.
FIG. 2A is a block diagram of a conventional TMDS transmitter 20. TMDS transmitter 20 converts video and sync information (R, G, B, HSYNC, VSYNC and DE) and input clock CLKIN to data streams for output to the corresponding receiver through signal lines by output drivers 142. FIG. 2B is a diagram of the output driver 141 and a corresponding input unit 182 of the receiver.
As shown in FIG. 2B, the TMDS output driver 142 is a current mode line driver, generating a differential signal over lines 191 and /191 by controlling the switches D and /D. For example, when the switch D is turned on, the current Idr on line 191 pulls down the voltage at the node N1 of the input device 184 in a TMDS receiver 18′ through the terminal impedance RT of about 50Ω. The other line /191, which carries no current at this time, is maintained at Avcc (3.3V), thus a differential voltage swing is achieved.
Currently, separate LVDS and TMDS transmitters in different chips are required for transmitting LVDS signals and TMDS signals.